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First projects with FPGA

September 14th, 2010 Leave a comment Go to comments

When I first recieved the board, I had already found out how to use Xilinx ISE to make schematic projects. So I made a 8-bit counter using flip-flops, AND and OR gates.
You can see the schematic here beneath:

Xilinx ISE - 8-bit Flip-Flop Counter Schematic



After a long chat with guy from HIH named Thomas (3rd semester), I got a pretty good understanding of the VHDL language and how to write to the FPGA.
So together with him I made my first project – a seven segment display decoder. It takes two 4-bit binary inputs and turns it into two HEX decimals on the seven segment display.
Afterwards I continued the project, and made a counter using the same seven segment decoder “module”.
Note: A module is like any other module in regular programming language; it works by importing it, and then using it’s “functions” – though you don’t have functions with FPGA’s, but instead you have entities with processes!

Finally I made a fully working 24-hour clock with hours, minutes and seconds. You are able to set the clock by using the switches and buttons.
I’ve uploaded a video to youtube about these projects so you can see what I’ve made.
Beneath the video I’ve also uploaded the VHDL code for the 3 projects, and the seven segment module, and the UCF (pin definition) files for use with the Basys2 board, for the different projects.




I’ve uploaded a zip file containing the VHDL code for the 3 Seven segment projects and UCF files for use with the Basys2 board.
You can grab the zip file here!

A new “easier to use” Seven Segment module can now be downloaded here: SevenSegment_Controller.zip

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  1. tekas
    October 15th, 2010 at 23:43 | #1

    Hi

    Thanks for the demo and codes. Unfortunately none of the 3 codes are working. I am using BASYS2 board with Xilinx 12.1

  2. October 16th, 2010 at 17:40 | #2

    @tekas
    What is wrong? Can you synthesize it, or is it when you put it on your board it doesn’t work?
    Which BASYS2 board do you have? I’m using the 100K version, and if you are using a different one, you have to change the Xilinx Project setting.

    With some more details I might be able to help you!

    Best Regards
    Thomas Jespersen

  3. Tim
    January 30th, 2011 at 06:16 | #3

    Hello,
    I am having a lot of trouble getting my porjects to work. I have tried Schematic and VHDL, and have followed tutorials and such up to the point of generating bit files and programing them on FPGA (I have the same borad Basys2 100K Spartan 3E). I think my problem is the .ucf files. When I try and use LOC = “whatever is printed on board e.g. L3” ISE WebPack will not Implement (fails to Map), I found some documents that give LOC for e.g L3 = “P35” or something, but none of these docs. say that it is for the Basys2 ~ it just says Basys.

    Any help would be much appreciated,
    Thank you!

  4. January 30th, 2011 at 14:09 | #4

    @Tim
    Dear Tim.
    When you started the project in ISE, did you remember to select the correct package, corrosponding to the one on the Basys2 board (CP132)? You can also change this later by going to Project Settings.
    But if the package isn’t set correctly, if you fx have set it to a TQFP package, then the mapper doesn’t understand the BGA Grid pins (A1, B2 and so on), it only understands P1, P2 and so on.

    So please check the project options/settings first, to see if the package matches the package of the Spartan 3E on the Basys2 board, which is a CP132.

    Best Regards
    Thomas Jespersen

  5. Tim
    January 30th, 2011 at 19:00 | #5

    @Thomas Jespersen
    Thomas,
    Thank you very much! Everything is making a lot more sense now! I have seen a lot of your work, and I think it is really cool.
    I want to get good at this too.
    Once again, Thank youvery much!

    Tim Donnelly

  6. January 30th, 2011 at 19:57 | #6

    @Tim
    I’m glad you got it working 🙂

  7. Ses
    March 31st, 2011 at 03:28 | #7

    Hello. Can you help me to make 0-60 counter using flip-flop and logic elements. It has to be count automatically and after counting it has to be some delay to re-count. if possible pls send me mail with schema

    • March 31st, 2011 at 10:14 | #8

      Hi.
      I won’t recommend making a counter circuit like this with a schematic. Instead I would make this using VHDL or Verilog, which can then be viewed as a schematic if required.
      In VHDL a such counter would only require about 20 lines of code.

      Best Regards
      Thomas Jespersen

  8. Ses
    April 4th, 2011 at 11:07 | #9

    i need schema like a top of this page. just triggers flip-flops/ i cant use any boards and i dunno what is VHDL Verilog

  9. April 5th, 2011 at 18:22 | #10

    @Ses
    I won’t recommend having 60 flip flops in a schematic like the one on the top, as it will be way to confusing.
    You can try to make it, and it will probably also work, but I won’t do it!

  10. Mel
    May 25th, 2011 at 20:18 | #11

    @Thomas
    I have a Basys2 100K Spartan 3E, and I am having the hardest time following some of the videos on youtube…for some reason it never seems to work for me! But I really need to use this board.
    Is it possible you make a detailed video, or maybe like on a paper writing out the different steps on making a simple counter(or anything) in VHDL? My main issue I believe is with setting up the actual files the .UCF and etc…

  11. May 25th, 2011 at 21:39 | #12

    @Mel
    Dear Mel.
    I will have a look at it.
    Would you mind writing me a mail using the contact formular on our website, then you will be the first to know when I upload the video.

    Best Regards
    Thomas Jespersen

  12. Mel
    May 27th, 2011 at 21:36 | #13

    @Thomas Jespersen
    Hi Thomas,
    Just checking to see if you got my email…
    let me know please.
    Thanks

  13. May 28th, 2011 at 09:29 | #14

    @Mel
    Hi Mel.
    No I haven’t recieved your mail – did you use our Contact formular?
    Please try again anyways: http://www.tkjelectronics.dk/?p=contact

    Best Regards
    Thomas Jespersen

  14. Mel
    May 28th, 2011 at 15:51 | #15

    Hi Thomas,
    I just sent you an email, (and no the last time I sent it was not through that same page!!!! don’t ask!!)

    Much thanks,
    Mel

  15. June 8th, 2011 at 21:33 | #16

    @Mel
    Dear Mel, and of course also everybody else.
    I have now uploaded a video tutorial on how to make a simple counter in VHDL for the Basys2 board.
    The video can be seen here: http://www.youtube.com/watch?v=Ob7B6x5g6tw

    Best Regards
    Thomas Jespersen

  16. user1
    June 9th, 2011 at 00:27 | #17

    Great tutorial! Very helpful! Hope to see more of this kind of fpga tutorials in the future 🙂

    Thanks for your effort!!!

  17. Lloyd Lowe
    September 6th, 2011 at 19:33 | #18

    Thanks for documenting your work here. I’ve recently ordered on of these dev boards and I’m excited to start playing with it.

  18. Dang Pham
    December 8th, 2011 at 02:35 | #19

    Dear buddy,

    I am Dang Pham.

    I am doing a project like what you did on the internet. I have been struggling with VHDL code count from 0 to 9999.
    I typed exactly the same your code on my computer but it is not working. maybe there was a bit different between yours and mine PCB.

    Can you send to me the whole your files of this project please?

    I am using Basys2 board for programming. Using software ISE Project Navigator to write VHDL code.

    I am waiting for your answer. This week is due for my project!

    cheers,

  19. December 11th, 2011 at 16:19 | #20

    @Dang Pham
    Dear Dang.
    Sorry for the late reply, I hope you can still make it.
    In the bottom of the post there is a download-link for the complete projects, including the VHDL files and the constraints file for the Basys2 board.

    It wouldn’t require much change in the VHDL code to limit it to 9999, and also make it show only the numeric value (not hex).
    I hope you can figure it out – if not, do not hesitate asking again.

    Best Regards
    Thomas Jespersen

  20. February 22nd, 2012 at 16:54 | #21

    Hi Thomas
    I have just bought and received my Basys2 FPGA board . I left it a little late in life
    to start ( I am now a pensioner) but I hope it will keep my brain active.

    I have so far only programmed in schematic mode , but had two small succeses using a few gates, leds and switches . I would dearly love to try counters , gates , 7 segment displays etc but have seen no tutorials for these using Schematic mode only Verilog and VHTL

    I put Basys2 into google and it bought me to your page where I watched the video about
    your first steps with FPGA’s with the video for the counter, clock , and 7 segment decoder.
    I clicked the link to download the files but after many tries it still says the download is a corrupt file . Do you have another link to it that is working please.
    Now I suppose I have to learn VHDL as there seems so few tutorials for doing it with schematics only

    Regards
    Don

  21. February 23rd, 2012 at 10:13 | #22

    @Don Recardo
    Dear Don.
    I am glad to know that a pensioner like you still have the interest in electronics and would like to spend some time with that. Well, now when you are a pensioner you have got more time, right? 🙂

    I can’t seem to find any problems with the download link, but please write us an email and then I will send it to you as an attachment.

    When developing FPGA logic people prefer to use some kind of coding language as it is much faster and more manageable when developing bigger applications.
    But it is possible to mix Schematic and VHDL mode, so you could actually use our 7-segment modules and then add them to your Schematic as a 7-segment block.

    So if you would like to stick with schematics, it is still possible to do more advanced projects, if you can find the required modules/blocks to include in Verilog or VHDL.

    Best Regards
    Thomas Jespersen

  22. abraham
    February 25th, 2012 at 18:02 | #23

    hi thomas I’ve found your project via youtube, first of all thanks for this sharing. I am studying a project about face detection if ? success then I will continue for face recognition. I wrote a matlab code for this aim but I want to use fpga so I need vhdl code. Maybe we translate my matlab code to vhdl or ? will start to write vhdl code. What do you think? Did you hear anything about face dedection with using fpga and vhdl?

    I am waiting for your answer, thank you.

  23. Don Recardo
    February 25th, 2012 at 18:49 | #24

    Hi Thomas
    I did send the email a couple of days ago to your info@tjk……. address
    I have since realised that this may be an email you no longer use . Could you let me know if its
    the wrong address and I will re send it

  24. February 28th, 2012 at 11:08 | #25

    @Don Recardo
    Dear Don.
    Thank you for letting me know of the problem. We have been switching mail servers recently and for an unknown reason the info@tkj… mail wasn’t recovered.
    Please send your mail again, either to info@ or the most used mail@tkjelectronics.dk
    Regards Thomas

  25. February 28th, 2012 at 11:16 | #26

    @abraham
    Dear Abraham.
    Yes I have heard of some facedetection routines implemented inside FPGA’s, but never inside such small FPGA’s as the one on the Basys2 board.
    I would atleast upgrade to a Spartan 6 if you are going to do any advanced video processing.

    I don’t know how well it will work to convert the matlab code to VHDL directly. I think you should rather think by logic, and how it would be possible to implement the different routines.

    Though most of the times, when doing such projects, you implement some logic for the video interpretion and you also implement some kind of microcontroller in the FPGA.
    The video interpreter is then internally attached to the microprocessors’ Wishbone, which makes it accessible by the microprocessor code.

    I hope this made it up with some of your questions 🙂

    Best Regards
    Thomas Jespersen

  26. Don Recardo
    February 28th, 2012 at 21:03 | #27

    Thanks for that Thomas.
    I have now reposted it to your mail@tjk address.

    BTW , is there a problem with your forum . I joined the other day thinking that as everyone will know more about FPGA’s than I do it might be a good source for answers to my questions .
    I made a post just to introduce myself but since then it has not appeared on the forum, infact it says there are no posts at all on there

    Don

  27. February 28th, 2012 at 22:32 | #28

    @Don Recardo
    Dear Don.
    About the forum it is pretty new so I haven’t figured everything out yet.
    It appears to me that new users posts have to be approved first, so your post is on the forum now. Thanks for your patience 😉

    I have also got your mail and will respond to that on a later time.

    Thomas

  28. Don Recardo
    February 29th, 2012 at 13:08 | #29

    Thank you Thomas

  29. rafael garcia
    March 30th, 2012 at 03:47 | #30

    hi, its an excelent video.
    i’m using the same fpag and i have this problem:

    WARNING:PhysDesignRules:367 – The signal is incomplete. The signal
    does not drive any load pins in the design.

    could you help me, here is my email: ragp33@gail.com

  30. April 1st, 2012 at 18:25 | #31

    @rafael garcia
    Dear Rafael.
    Which of the projects from the ZIP file are you trying, or have you made your own?
    Have you remembered to make the UCF (pin constraints file) to assign the internal logic Inputs and Outputs to the “outer world” pins?

    Best Regards
    Thomas Jespersen

  31. ghazaleh
    July 8th, 2012 at 10:49 | #32

    can any body help me about verilog code for 7segment??

  32. July 24th, 2012 at 18:56 | #33

    @ghazaleh
    Sorry, but unfortunately we don’t have much experience with Verilog as we prefer to use VHDL.

    But you might have a look at this page which gives you an idea on how to control a SINGLE 7-segment display.
    To control multiple you would have to make a multiplexing statemachine as explained.

    Regards Thomas

  33. sam
    November 5th, 2012 at 21:19 | #34

    heyy .. i have been trying to display two diffrent numbers onthe seven segment at the same time.. so if i input a binary value of 24 the number on the seven segment should be 13.. do you have any idea about how to display both the numbers at the same time..

  34. November 6th, 2012 at 20:14 | #35

    @sam
    You can divide the displays and what to display as you like.
    But I don’t understand what you are trying to display. If you have a binary number of 24 you would like to display 13?? :-O

    Please elaborate a bit and I will try to help you the best I can.

    Regards Thomas

  35. alex
    November 9th, 2012 at 03:02 | #36

    heyyy .. i am trying to write a verilog module so that 4 swtiches on the basys board would control the fisrt two seven segments and the other two seven segments display 0 all the time.. can you plzz help me with this .. thank you 🙂

  36. November 10th, 2012 at 15:12 | #37

    @alex
    I guess your case is to interpret the 4 switches as a 4 bit number, so the seven segment should display “0000” to “1500”?
    You would either need to make a Binary to BCD decoder or in your case as it is only 16 numbers, make a “case, endcase” assignment that converts the binary input to two output numbers for the two seven segments to be used.
    These two output numbers can then be assigned to our seven segment decoder that will then display the numbers on the proper displays.

    Regards Thomas

  37. alex
    November 11th, 2012 at 23:18 | #38

    hey .. i can all the numbers like AAAA at the same time.. but i dunt know how to diplay AA00 at the same time ???

  38. November 16th, 2012 at 23:34 | #39

    @alex
    I have now uploaded a much easier to use Seven segment controller module where you can set the value of each 4 individual seven segments just by assigning a variable.
    These 4 values are set in the “SevenSegment_Demo.vhd” file.

    The controller can be downloaded here: SevenSegment_Controller.zip

    Best Regards
    Thomas Jespersen

  39. jason
    November 18th, 2012 at 01:08 | #40

    Hey Thomas,
    I need a countdown clock, that includes minutes and seconds, can be set by using the swithces. It should counts down from 15 mins and 45 secs for instance. Can you help me?

    Thanks.

  40. November 18th, 2012 at 21:41 | #41

    @jason
    Hi Jason.
    We can for sure help you with this, for us relatively simple VHDL project.
    It would be a matter of modifying our Clock example to count down instead of up 😉

    Please contact me directly at: thomasj(at)tkjelectronics.dk so we can discuss the project.

    Best Regards
    Thomas Jespersen

  41. amanda
    December 4th, 2012 at 06:47 | #42

    hello i´m new in all this world of vhdl and fpga, well i was wondering if you could help me, i want to design a circuit in my basys2 that counts down starting in 15 and with a conbination in the switch make it stop, else when the counter ends in 0 the displays shown the word “dEAd”, well this is for a project and i wanted to make it like a little game… and also it should have a button of reset so that the game can start again, could you help me?, thanks

  42. December 13th, 2012 at 20:49 | #43

    @amanda
    Dear Amanda.
    This is a fairly simple and introductive VHDL project, which will require some basic knowledge of prescalers, multiplexing, counter techniques and variable assignation.
    We can of course make the project for you but we can also guide you and explain some great details on how you could do the project yourself.

    If you are interested in this please feel free to contact me at: thomasj(at)tkjelectronics.dk so we can discuss the details and I can give you an offer.

    Regards Thomas

  43. amanda
    December 28th, 2012 at 03:46 | #44

    hello i’m amanda, well for the project i somehow manage to do something not reailly what i wanted because i don´t really understand well how to use the fpga because i´m preatty new in these and my teacher really didn´t teach us anything like that, only to program in gpa, well i really want to learn how to use the fpga better, until now the only things i have done are counters and my proyect was a descendant counter when i put the switches in the correct order the counter stoped, and when not in the display was shown one figure, i dont know how to do that the displays shows 15 so it had to be with F and i dont know how to shown the word dead in the displays so if you could oriented me in the use of this device i would really apreciate, i dont really know much of how to use it so i would really thank you if you help me

    regard amanda

    PD: sorry for the spelling i don´t really speak English
    PDD: how do i contact u??

  44. December 28th, 2012 at 13:43 | #45

    @amanda
    I am sorry to hear that you are struggling with it.
    I don’t know what GPA is, as I am currently only aware of two types of FPGA programming languages, VHDL and Verilog.
    To make the counters display 15 instead of 0F is also a very difficult task as you need to assign a single digit to multiple HEX numbers. But the technique which does this is called a “Binary to BCD encoder”.
    This encoder divides the binary input number (your counter) into multiple numbers (between 0-9), so one for each digit.
    When you would like to display “dEAd” you would simply have to make a “when…else…” statement that sets the display output digits to “dEAd” when the “counter = 0”.

    Regards Thomas

  45. Tom
    February 24th, 2013 at 16:36 | #46

    Thanks for the video tutorials using the BASYS2. They were a big help in getting started with this technology. I had no problem running them (other than the usual self-inflicted wounds :).

    Tom

  46. July 2nd, 2014 at 18:05 | #47

    where to get the circuit board?

  47. July 4th, 2014 at 07:20 | #48

    @Douglas ..
    The development board used in the demonstration is a Digilent Basys2 board.
    This can be purchased directly on their web shop or from their distributors.

  48. Netto
    July 31st, 2014 at 03:42 | #49

    I love you, my clock multiplexing method was not working and I was working on it for 30+hrs straight for a 60min timer. Your method was flawless.

  1. September 21st, 2010 at 23:02 | #1
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