Generating a VGA signal with an FPGA
I posted this video on Youtube long time ago, but I forgot to write about it on my blog.
In the video I demonstrate how the Basys2 board, with a Spartan-3E 100K, can be used to generate a VGA signal.
I also show my bouncing ball application.
You can download the Xilinx project files here, including the VHDL files and User Constraint File for the Basys2 board.
Categories: FPGA
I programmed your .bit file to my board, but when I connect my board to a TV via VGA, nothing shows up!
It’s because I’m using an external oscillator (the socket).
For VGA generation the onboard oscillators precision is not very good, which means that you CAN generate a VGA signal, but straight vertical lines will be crumby.
So if you haven’t mounted any external oscillator, you would have to go to the User Constraint File and make the following changes on the first two lines:
NET “CLK_50MHz” LOC = “B8″;
#NET “CLK_50MHz” LOC = “M6″; # External socketed Oscillator
Ohhhh, thanks!
So I tried it, and I see what you mean about the vertical lines being “crumby.”
It’s good to test anyway…
how do you configure an external oscillator (out of curiousity)?
Thanks… I appreciate your help!
@J
You would need to buy an oscillator in 8-pin DIP packaging. I got one with 4 pins, but in the size of an 8-DIP: http://www.ecsxtal.com/store/pdf/ecs_2100.pdf
Then you plug this oscillator into the IC6 socket, and then you use the M6 FPGA input instead of B8.
These oscillators are more precise than the one on the Basys2 board, which is essential for generating clear VGA signals, as those are higher precision speeds.
Best Regards
Thomas Jespersen
Hello,
I want to get started with FPGAs and right now I’m in the process of deciding which eval-board I’ll buy.
Can you tell me how “full” the FPGA gets with this demo? I’m trying to get a feeling of how much I can do with the 100k LEs I can do.
Thanks and regards,
Leo
@Leo
In the 100K Spartan 3E device you have a total amount of 960 slices, which is the way you count how much of the FPGA that is occupied.
With the Large Res Bouncing Ball project 159 of these 960 slices are occupied. That means that 16% of the FPGA resources is used, which is not much!
The Basys2 board is a very easy to use FPGA board for beginners. The board is commonly seen on universities around the world.
If you are new to FPGAs I will recommend you to get one of those, as you can download a great number of examples and it comes with an on-board programmer, so there is no need to invest in a JTAG programmer.
Happy new year.
Thomas
Hello,
I am trying to display an image via VGA out of my Basys2 FPGA board. I have a rom vhdl file and a VGA controller unit. I am passing a vector from the rom file into controller unit that contains the image data (black and white ~ std_logic). I want to check at each index (based off the horizontal position ~ ScanlineY value) to see if I should display a color or not. I tried using image_data_vector(conv_integer(ScanlineY)) = ’1′ but it doesn’t work. I am using ieee.numeric.std, ieee.logic_unsigned, and ieee.artith. If Do you have any suggestions? A better question to ask might be is this even an appropriate way to try and display an image?
Thank you,
Tim
@Tim
Dear Tim.
I would do it the exact same way as you do. The image block you have in the ROM, how is that defined? As a Std_logic_vector(x downto y)?
If you have included IEEE.STD_LOGIC_ARITH.ALL and IEEE.STD_LOGIC_UNSIGNED.ALL it should be no problem to just use the ScanlineY as the vector pointer.
But I would do it the same way, defining the pixel-buffer as a std_logic_vector and then read every bit from there when scrolling thru the display.
Best Regards
Thomas Jespersen