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LVDS Display controller for microprocessors

October 3rd, 2012 Leave a comment Go to comments

We have had a couple of embedded projects for our customers where the requirement were large-screen LVDS displays. By large screen I mean sizes over 7″ and a resolution of 800×480 where the common SSD1963 LCD controller can’t be used as the frame buffer RAM is too small.

LVDS Display Controller V1.0

So now we have decided to make our own similar display controller board but for LVDS displays as they are much more inexpensive and common (used in TVs and PCs).
As LVDS is a differential signal standard we can’t just connect it directly to an MCU even though it supported the larger display resolutions. So as we already had to use some kind of converter in between we decided to go with an FPGA and embed a complete display controller solution into it.

The FPGA is connected to the LVDS display using an 8-bit differntial pair interface. Then it is connected to a 16-mbit ISSI SRAM for the framebuffer and finally to a 16-bit Host interface which is made compliant to the Motorola-8080 standard which is commonly seen in other TFT display controllers such as ILI9320, SSD2119 and SSD1963.
And as we both need a lot of pins (over 50 I/O pins) and a reasonable portion of available logic we decided to go with the 250K version of the Xilinx Spartan 3E device.

The standard Host interface we made makes it possible for any microcontroller or microprocessor to write to the display controller and thereby display graphics on these larger resolution displays.
Even a small and a bit slow Arduino will be able to display graphics on the display though it won’t be able to do full screen updates that fast.
But to make it a bit more featured and more comfortable to use with smaller microprocessors we have made some fast Clearings and write commands that doesn’t require a lot of write cycles from the Host microprocessor.

So currently the display controller supports the following commands:

  • Set framebuffer writing pointer position (X,Y)
  • Set framebuffer access region (X0,Y0,X1,Y0)
  • Reset framebuffer access region
  • Framebuffer writing – write pixels to pointer position
  • Put pixel (X,Y,Color)
  • Clear display (Color)
  • Clear region (X0,Y0,X1,Y1,Color)

We have already planned to extend the command set to be able to set some timing parameters of the LVDS display used together with the resolution so the board will become more flexible as it can be used with many different displays.

To see the board in action connected to the FSMC (Flexible Static Memory Controller) bus of the STM32F4DISCOVERY board please watch the video below.

Finally we have a couple of close-up photos of the board components:

The Xilinx Spartan 3E 250K FPGA used

16-Mbit SRAM for framebuffering

Voltage regulators for the FPGA

On board SPI flash for the FPGA configuration file

Our initial plan with this board was actually to embed it in a commercial product we are currently working on, as it required a larger display.

But if everything works out well and we get some good response on this work we might start a production of the display controller “evaluation” board itself so other people can start using some of their trashed Laptop LVDS displays with their Arduino or similar microprocessor.

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